The present ivention relates to color television circuits and, more particularly, to a SECAM decoder circuit.
In the SECAM system, the chrominance informations are provided by modulation of a chrominance subcarrier. Two successive lines respectively contain R-Y informations representative of red and B-Y informations representative of blue. These informations are contained in the frequency modulation of the subcarrier, which is distinct for two successive lines (4.406 MHz for red and 4.250 MHz for blue). It will be said that the signal contains a succession of red and blue modulated lines. Of course, the terms "red line" and "blue line" are used here as a simplification and one can refer to conventional literature about the SECAM system to more accurately define the content of the chrominance informations carried by successive lines.
In a television set, it will thus be necessary to separate the blue and red lines on two channels each comprising respectively only blue lines and only red lines, and to demodulate these lines. According to the above, on each channel respectively, a succession of blue demodulated lines and one line long blanks (generally 64 microseconds long), and a succession of demodulated red lines and one line long blanks, are obtained. Each of these blanks is subsequently filled by the previous blue or red line by delaying it by a line period. Thus, two channels respectively providing a blue line--delayed blue line succession and a red line--delayed red line succession are obtained. The interval remaining between the lines, the line retrace, is set at a reference level (generally zero) representing black. This set of operations constitutes the SECAM decoding.
FIG. 1 represents a first SECAM decoder of the prior art. A two channel permutating circuit 10 receives on a direct channel the chrominance subcarrier SP and on a delayed channel the subcarrier SP delayed by a delayed line 11 of a line period T.sub.H. The permutating circuit is activated by a square signal of half the line frequency F.sub.H /2, which switches it at each line. On a first output channel BO a delayed line--direct line succession, which is no other than, for example, the blue line--delayed blue line succession, is obtained and on a second output channel RO, a direct line--delayed line succession, which is no other than, for example, the red line--delayed red line succession, is obtained. Afterwards, channel BO, respectively RO, passes through a conventional demodulator 12, respectively 13, of which the central demodulation frequency F.sub.OB of blue respectively F.sub.OR of red, is established by an adjustable LC circuit. After demodulation, signal BO, respectively RO, is fed to a blanking circuit 14, respectively 15, controlled by a blanking signal BLK which assumes an active level during the line retrace periods to re-establish the black level.
The blanking circuits, generally constituted by an analog switch setting the output signal at zero, are essential, especially after a demodulator, because the black level between the lines is generally subject to an involuntary DC offset after processing of the lines. The permutating circuit, the demodulators and the blanking circuits of such a decoder are in general integrated in bipolar technology in the same integrated circuit. Around this integrated circuit, it is thus necessary to provide a delay-line and two LC circuits, which cannot be integrated. The delay-line, placed before demodulation, must be a high frequency delay-line because it must allow the high modulation frequencies to pass. It is generally constituted by a quartz crystal. The permutating and the blanking circuits are complex because it is difficult to realize analog switches in bipolar technology.
FIG. 2 reproduces the FIG. 1 of the European Patent Application 0 009 204 which describes a chrominance decoder essentially intended for the PAL standard. The subcarrier SP is provided to two demodulators 21 and 22 of which the respective outputs B1 and R1 are each connected directly to an input and through a delay-line 23, 24 to another input of an adder 25, 26. The outputs of these adders form the decoded outputs B2 and R2. The demodulators, the delay-lines and the adders are Charge-Coupled-Devices (CCD). The CCD elements 21, 23 and 25 of the blue channel as well as the CCD elements 24 and 26 of the red channel are controlled by the PAL reference frequency FB divided by 2 through a divider 27. The CCD demodulator 22 is controlled by a frequency FR divided by 2 through a divider 28. The phase of signal FR with respect to that of signal FB is switched between + and -90.degree. at each line.
With this configuration, at the output of demodulator 21, a signal B1 approximately null during the red lines and comprising the demodulated blue informations during the blue lines is obtained. In the same way, at the output of demodulator 22, a signal R1 approximately null during the blue lines and comprising the demodulated red informations during the red lines is obtained. The adders and the delay-lines enable the filling of the blanks at the outputs of the demodulators by the demodulated informations of the previous line.
A drawback of this circuit is that the output of the demodulators is not exactly null when they receive a line that does not correspond to them. Thus, at the output of the adders, the delayed lines are combined with non null informations which constitute noise that can deteriorate the image. Moreover, blanking circuits must be provided at the output of the adders, as it is done in FIG. 1, in order to re-establish the black level between the line retrace periods.
The application 0 009 204 provides the use of this circuit as a SECAM decoder, but the modifications to bring, namely the additional components to provide, are so numerous that the decoder becomes uselessly complex.
An object of the present invention is to provide a SECAM decoder of a similar architecture as that of FIG. 2 needing only external signals that exist in a television set.
Another object of the present invention is to provide a SECAM decoder needing no external components, namely blanking circuits, nor adjustments.